As global large language models continue to iterate, AI compute capacity is expanding exponentially, accelerating the deployment of 10,000-GPU and 100,000-GPU intelligent computing clusters. In August this year, NVIDIA announced full mass production of its Spectrum-X Ethernet silicon photonics switch, the world’s first mass-produced 200G/lane co-packaged optics (CPO) switch system. Official data shows that, compared with traditional pluggable optical module solutions, it reduces laser count by 75%, lowers overall system power consumption by about 80%, and cuts link loss from as high as about 22 dB to about 4 dB. As a result, 2026 is being called the “first year of CPO mass production” by the industry.
Yet within the optical communications supply chain, most industry attention remains on optical modules and CPO, while MPO multi-fiber patch cords are often overlooked. AI servers require large numbers of MPO patch cords to handle data exchange between GPUs and between servers and switches; a single GPU server can require an MPO patch-cord ratio of 1:3, and a three-tier interconnect can need more than 24,000 MPO cables. At the most inconspicuous link in the chain is a tiny pin just 0.1263 mm in diameter, which determines whether dozens of optical fibers can be aligned precisely.
The shift from copper to fiber is essentially a path forced by compute demand. Copper is suitable only for short-distance transmission within a few centimeters, whereas AI clusters routinely span an entire data center. Optical fiber can deliver bandwidth in the tens of THz range, loss as low as about 0.2 dB/km, and a fraction of the volume and weight of copper. The industry is moving from single-fiber to 8-, 12-, and 16-fiber designs, with 32- and 64-fiber configurations on the horizon. The strong momentum in optical modules has also been confirmed by financial results: in 2025, global sales of optical modules and related products reached about $26.8 billion, up 74% year over year; in Q1 2026, optical module and AOC sales were about $10 billion, up 90% year over year.
The problem is that the pace of compute expansion and the maturity of supporting engineering are not synchronized. GPUs can be stacked generation after generation, but the yield, loss, and failure rates of connectors cannot be aligned overnight. As clusters scale from thousands to tens of thousands and then hundreds of thousands of GPUs, a defect in any single patch cord can be magnified into a cluster-level weakness. The compute bottleneck is therefore shifting from the “chip” itself to “between chips.”
This is precisely the direction StarWar Technology continues to focus on in its GPU compute platform and compute scheduling: organizing dispersed, heterogeneous accelerator cards and servers into a unified resource pool. It is not just about onboarding cards into management; network, bandwidth, and topology must also be brought into scheduling. Only when interconnect conditions are considered together can tasks be placed on truly suitable resources, avoiding the situation where “the chips are powerful, but the cluster is slow.”
From this perspective, compute competition is shifting from single-point performance to system-level capability. Whoever can connect chips, optical interconnect, switching, software stacks, and operations into a stable chain is more likely to turn paper specifications into deliverable compute. The supply chain’s prosperity will also spread from “visible modules” to “inconspicuous connectors.” China’s Ministry of Industry and Information Technology (MIIT), in its White Paper on the Development of the High-Speed Optical Module Industry, forecasts that the global 1.6T optical module market will reach $4.5 billion in 2026, with the share of domestic Chinese